self-winding clock

An optical interconnection system for testing array devices is designed. The clock optical array is generated by a BPG ( Binary Phase Grating). And the signal optical array is generated by a 2 × 8 SEED ( Self Electrooptic Effect Device) array working as modulators.

设计了一个测试列阵器件的光互连系统，系统的时钟光点阵由二位相光栅（BPG）产生，测试所需的信号光点阵由一个2×8的SEED器件对时钟光进行调制产生。

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Based on a single ternary linear feedback shift register ( LFSR) which is a combined model of the clock-controlled generator and the self-shrinking generator, a construction of a pseudo-random generator, called a self-editing generator is presented.

将钟控生成器与自缩减生成器组合构成了一种新型的伪随机序列生成器&自缩控生成器，仅由一个三元的线性反馈移位寄存器（LFSR）构成。

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Design and Implementation of Self-Control Clock Based on GPS Time Source

基于GPS时间源的自控时钟的设计与实现

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Application of Self-adaptive Filtering Mothod to Atomic Clock Coloured Noise Model

原子钟有色噪声模型的自适应滤波方法的探讨

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Clock-delayed domino is a self-timed dynamic logic developed to provide single-rail gates with inverting or noninverting outputs.

时钟延迟多米诺逻辑是一种自定时的动态逻辑。时钟延迟多米诺逻辑门的输出信号是单向跳变的，但它可以提供倒相和非倒相的输出。

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